Dual gate logic device

Details Dual gate logic device Dual gate logic device

2005-05-10

2005-05-10

Everhart, Caridad (Department: 2825)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S412000, C257S369000

Reexamination Certificate

active

06891226

ABSTRACT:
The present invention features double- or dual-gate logic devices that contain gate conductors that are consistently self-aligned and that have channels that are of constant width. A single-crystal silicon wafer is utilized as the channel material. Pillars or stacks of self aligned dual gate MOSFETs are generated by etching, via the juxtaposition of overlapping germanium-containing gate conductor regions. Vertically etching through regions of both gate conducting material and dielectric insulating material provides an essentially perfect, self-aligned dual gate stack.

REFERENCES:
patent: 6518106 (2003-02-01), Ngai et al.
patent: 6551871 (2003-04-01), Takamura
patent: 6596605 (2003-07-01), Ha et al.
Jong-Ho Lee et al., “Super self-aligned double-gate (SSDG) MOSFETs utilizing oxidation rate difference and selective epitaxy,” Electron Devices Meeting, 1999, pp. 71-74.
Jong-Ho Lee, et al., IEEE IEDM 99-71 through IEDM99-74.
Hon-Sum Philip Wong, et al., IEEE IEDM 98-407 through IEDM 98-410.
Hon-Sun Philip Wong, et al., IEEE IEDM 97-427 through IEDM 97-429.

Affiliated with

Also associated with

Rating

Dual gate logic device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual gate logic device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual gate logic device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3415768