Dual damascene fabrication with low k materials

Details Dual damascene fabrication with low k materials Dual damascene fabrication with low k materials

2006-07-18

2009-11-17

Sarkar, Asok K (Department: 2891)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C257SE21579, C438S637000, C438S639000

Reexamination Certificate

active

07618889

ABSTRACT:
The invention provides methods and apparatuses for fabricating a dual damascene structure on a substrate. First, trench lithography and trench patterning are performed on the surface of a substrate to etch a low-k dielectric material layer to a desired etch depth to form a trench prior to forming of a via. The trenches can be filled with an organic fill material and a dielectric hard mask layer can be deposited. Then, via lithography and via resist pattering are performed. Thereafter, the dielectric hard mask and the organic fill material are sequentially etched to form vias on the surface of the substrate, where the trenches are protected by the organic fill material from being etched. A bottom etch stop layer on the bottom of the vias is then etched and the organic fill material is striped. As a result, the invention provides good patterned profiles of the via and trench openings of a dual damascene structure.

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