Dual damascene copper interconnect to a damascene tungsten...

Details Dual damascene copper interconnect to a damascene tungsten... Dual damascene copper interconnect to a damascene tungsten...

2001-03-23

2003-05-20

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S618000, C438S623000, C438S624000, C438S636000, C438S637000, C438S638000, C438S648000, C438S672000, C438S687000

Reexamination Certificate

active

06566242

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a method and structure for fabricating a dual damascene copper wiring interconnect contacting a damascene tungsten wiring level.
2. Related Art
An integrated circuit fabricated on a semiconductor substrate typically requires multiple levels of metal interconnections for electrically interconnecting discrete semiconductor devices on the semiconductor substrate. A lower wiring level of damascene tungsten contacts is commonly used to provide local interconnections between the semiconductor devices which exist within and upon the substrate layer. Unfortunately, it is problematic to generate reliable, low resistance contacts between an upper level of damascene copper wiring and the lower wiring level of damascene tungsten contacts.
There is a need for a method and structure that generates reliable, low resistance contacts between an upper level of damascene copper wiring and the lower wiring level of damascene tungsten contacts.
SUMMARY OF THE INVENTION
The present invention presents a method for fabricating an electronic structure, said method comprising the steps of:
providing a wafer having a semiconductor substrate;
forming a first layer on the semiconductor substrate, wherein the first layer includes a plurality of electrically conducting regions, wherein each electrically conductive region includes an electrically conductive material selected from the group consisting of tungsten and silicon, and wherein the electrically conducting regions are separated by insulative dielectric material;
forming an etch stop layer over the first layer, wherein the etch stop layer includes an etch stop insulative material;
forming an insulator layer over the etch stop layer, wherein the insulator layer includes an electrically insulative material;
forming a plurality of contact vias extending through the insulator layer down to the etch stop layer and over corresponding electrically conducting regions such that there is not substantial rounding of the corners at the top of the reduced height portion of the insulator layer;
etching a top portion of the insulator layer adjacent each contact via, leaving a reduced-height portion of the insulator layer adjacent each contact via such that a continuous space is formed, wherein the continuous space includes each contact via and a space above the reduced-height portion of the insulator layer;
etching the etch stop layer at the bottom of each contact via, which exposes top surfaces of the corresponding electrically conducting regions below each contact via; and
filling the continuous space with a refractory metal liner and damascene copper such that a damascene copper interconnect is formed within the continuous space, wherein the damascene copper interconnect is in electrically conductive contact with the top portions of the electrically conducting region.
The present invention provides an electronic structure, comprising:
a semiconductor substrate;
a first layer on the semiconductor substrate, wherein the first layer includes a plurality of electrically conducting regions, wherein the electrically conductive regions each include an electrically conductive material selected from the group consisting of tungsten and silicon, and wherein the electrically conducting regions are separated by insulative material;
a damascene copper interconnect wiring level having a plurality of damascene copper wires within one or more corresponding damascene contact vias wherein each damascene copper wire is in electrically conductive contact with a corresponding conducting region of the electrically conducting regions;
an etch stop layer on the first layer, wherein each etch stop layer does not exist where the damascene contact via exists, and wherein the etch stop layer includes an etch stop insulative material;
a first insulator region of an insulator layer on a first portion of the etch stop layer and contacting a first surface of the damascene copper interconnect, wherein the first insulator region includes an electrically insulative material;
a second insulator region of the insulator layer on a second portion of the etch stop layer and contacting a second surface of the damascene copper interconnect, wherein the second insulator region includes the electrically insulative material; and
a third insulator region on a third portion of the etch stop layer and disposed between the damascene copper interconnect and the third portion of the etch stop layer, wherein the second insulator region includes the electrically insulative material.
The present invention provides a method of cleaning a surface of a volume of material, comprising the steps of:
providing the volume of material, wherein the material includes a refractory metal or silicon; and
acid cleaning with hydrofluoric acid the surface of the volume of material.
The present invention further provides a method for fabricating an electronic structure, said method comprising the steps of:
providing a wafer having a semiconductor substrate;
forming a first layer on the semiconductor substrate, wherein the first layer includes a plurality of electrically conducting regions, wherein each electrically conductive region includes an electrically conductive material selected from the group consisting of tungsten and silicon, and wherein the electrically conducting regions are separated by insulative material;
forming an etch stop layer over the first layer, wherein the etch stop layer includes an etch stop insulative material;
forming an insulator layer over the etch stop layer, wherein the insulator layer includes an electrically insulative material;
forming a contact via extending through the insulator layer down to the etch stop layer and over a corresponding electrically conducting region such that there is not substantial rounding of the corners at the top of the reduced height portion of the insulator layer;
etching the etch stop layer at the bottom of the contact via, which exposes the top surface of the corresponding electrically conducting region below the contact via; and
filling the contact via with a refractory metal liner and damascene copper such that a damascene copper interconnect is formed within the contact via, wherein the damascene copper interconnect is in electrically conductive contact with the top portion of the electrically conducting region.
The present invention therefore provides a method and structure that generates reliable, low resistance contacts between an upper level of damascene copper wiring and the lower wiring level of damascene tungsten contacts.


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