Dram with (1/2)VCC precharge and selectively operable limiting c

Static information storage and retrieval – Read/write circuit – Precharge

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Details

36518906, 36518907, G11C 1134

Patent

active

049673955

ABSTRACT:
An amplitude limiting circuit is arranged in a DRAM with (1/2) VCC precharge to equalize an amplitude between a precharge voltage and an "H" level output of each pair of bit lines charged and discharged in an active cycle with an amplitude of the precharge voltage and an "L" level output of each pair of bit lines.

REFERENCES:
patent: 4780850 (1988-10-01), Miyamoto et al.
patent: 4785427 (1988-11-01), Young
patent: 4821237 (1989-04-01), Iwahashi

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