Dram memory cell with a trench capacitor and method for...

Details Dram memory cell with a trench capacitor and method for... Dram memory cell with a trench capacitor and method for...

2007-05-29

2007-05-29

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S242000, C438S243000, C438S245000, C438S246000, C438S248000, C438S259000, C438S270000, C438S386000, C438S387000, C438S388000, C438S389000, C438S391000, C438S561000, C257SE21653

Reexamination Certificate

active

10479522

ABSTRACT:
A memory cell includes a selection transistor and a trench capacitor. The trench capacitor is filled with a conductive trench filling on which an insulating covering layer is arranged. The insulating covering layer is laterally overgrown, proceeding from the substrate with a selectively grown epitaxial layer. The selection transistor is formed in the selectively grown epitaxial layer, comprises a source region connected to the trench capacitor and a drain region connected to a bit line. The junction depth of the source region is chosen so that the source region reaches as far as the insulating covering layer. Optionally, the thickness of the epitaxial layer can be reduced to a thickness by oxidation and a subsequent etching. Afterwards, a contact trench is etched through the source region down to the conductive trench filling, which trench is filled with a conductive contact and electrically connects the conductive trench filling to the source region.

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