DRAM circuitry having storage capacitors which include...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Reexamination Certificate

active

06835975

ABSTRACT:

TECHNICAL FIELD
This invention relates to methods of depositing aluminum nitride comprising layers over semiconductor substrates, to methods of forming DRAM circuitry, to DRAM circuitry, to methods of forming field emission devices, and to field emission devices.
BACKGROUND OF THE INVENTION
This invention was principally motivated in addressing problems and improvements in dynamic random access memory (DRAM) and in field emission devices, such as displays.
As DRAMs increase in memory cell density, there is a continuing challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally, there is a continuing goal to further decrease cell area. One principal way of increasing cell capacitance is through cell structure techniques. Such techniques include three-dimensional cell capacitors, such as trenched or stacked capacitors. Yet as feature size continues to become smaller and smaller, development of improved materials for cell dielectrics as well as the cell structure are important. The feature size of 256 Mb DRAMs will be on the order of 0.25 micron or less, and conventional dielectrics such as SiO
2
and Si
3
N
4
might not be suitable because of small dielectric constants. Highly integrated memory devices, such as 256 Mbit DRAMs and beyond, are expected to require a very thin dielectric film for the 3-dimensional capacitor of cylindrically stacked or trench structures. To meet this requirement, the capacitor dielectric film thickness will be below 2.5 nm of SiO
2
equivalent thickness.
Field emission displays are one type of field emission device, and are utilized in a variety of display applications. Conventional field emission displays include a cathode plate having a series of emitter tips fabricated thereon. The tips are configured to emit electrons toward a phosphor screen to produce an image. The emitters are typically formed from an emitter material such as conductive polysilicon, molybdenum, or aluminum. Multiple emitters are typically utilized to excite a single pixel. For example, 120 emitters may be used for a single pixel. Individual pixels contain a deposited one of red, green, or blue phosphor.
Clarity, or resolution, of a field emission display is a function of a number of factors, including emitter tip sharpness. Specifically, sharper emitter tips can produce higher resolution displays than less sharp emitter tips. One adverse phenomenon impacting emitter tip sharpness is undesired native oxidation of the emitter tips during fabrication if exposed to an oxidizing atmosphere, such as room air. Such oxidation consumes material of the tips in forming an oxide and reduces sharpness and therefore clarity.
SUMMARY OF INVENTION
The invention is a method of depositing an aluminum nitride comprising layer over a semiconductor substrate, a method of forming DRAM circuitry, DRAM circuitry, a method of forming a field emission device, and a field emission device. In one aspect, a method of depositing an aluminum nitride comprising layer over a semiconductor substrate includes positioning a semiconductor substrate within a chemical vapor deposition reactor. Ammonia and at least one compound of the formula R
3
Al, where “R” is an alkyl group or a mixture of alkyl groups, are fed to the reactor while the substrate is at a temperature of about 500° C. or less and at a reactor pressure from about 100 mTorr to about 725 Torr effective to deposit a layer comprising aluminum nitride over the substrate at such temperature and reactor pressure. In one aspect, such layer is utilized as a cell dielectric layer in DRAM circuitry. In one aspect, such layer is deposited over emitters of a field emission display.
In one aspect, the invention includes DRAM circuitry having an array of word lines forming gates of field effect transistors and an array of bit lines. Individual field effect transistors have a pair of source/drain regions. A plurality of memory cell storage capacitors are associated with the field effect transistors. Individual storage capacitors have a first capacitor electrode in electrical connection with one of a pair of source/drain regions of one of the field effect transistors and a second capacitor electrode. A capacitor dielectric region is received intermediate the first and second capacitor electrodes, with the region comprising aluminum nitride, and the other of the pair of source/drain regions of the one field effect transistor being in electrical connection with one of the bit lines.
In one aspect, a field emission device includes an electron emitter substrate including emitters having at least a partial covering comprising an electrically insulative material other than an oxide of silicon, with aluminum nitride being but one example. An electrode collector substrate is spaced from the electron emitter substrate.


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