DRAM cell with a fork-shaped capacitor

Details DRAM cell with a fork-shaped capacitor DRAM cell with a fork-shaped capacitor

1999-07-06

2000-12-19

Booth, Richard

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438239, 438240, 438241, 438242, 438250, 438251, 438253, 438254, 438255, 438256, 438393, 438394, 438396, 438397, 438398, 438399, H01L 218242, H01L 2120

Patent

active

061626813

ABSTRACT:
A method for forming a fork-shaped capacitor of a dynamic random access memory cell is disclosed. The method includes forming a first conductive layer (118) over a semiconductor substrate (110), wherein at least a portion of the first doped polysilicon layer communicates to the substrate. A first dielectric layer is formed on the first conductive layer and is then patterned to form an opening therein and expose a portion of the first conductive layer. A second conductive layer is formed on the sidewall of the first dielectric layer and the exposed portion of the first conductive layer. A second dielectric spacer is formed on the sidewall of the second conductive layer. The first conductive layer is etched using the second dielectric layer as a mask, and a third conductive spacer is formed on the sidewalls of the second dielectric spacer. The second dielectric layer are then removed. Finally, a third dielectric layer and a fourth conductive layer are formed in turn on the first, the second, and the third conductive layers.

REFERENCES:
patent: 5702974 (1997-12-01), Kim
patent: 5972769 (1999-10-01), Tsu et al.
patent: 6027981 (2000-02-01), Wu

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