DRAM cell plate and precharge voltage generator

Static information storage and retrieval – Read/write circuit – Precharge

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365226, G11C 1124

Patent

active

052552322

ABSTRACT:
A method and apparatus for precharging memory cell bit storage capacitors and bit lines of a DRAM from a single source. The storage capacitor reference plate is driven from a high impedance voltage divider, minimizing the effects of voltage supply noise, so that noise does not couple into the storage capacitor and turn on the associated capacitor access transistor. At the same time the bit line is driven from a low impedance drive, to enable it to maintain the bit line midpoint voltage. The bit line precharge voltage is referenced to the storage capacitor reference voltage providing good cell margin.

REFERENCES:
patent: 4769784 (1988-09-01), Doluca et al.
patent: 4794571 (1988-12-01), Uchida
patent: 4809230 (1989-02-01), Konishi et al.
patent: 4839865 (1989-06-01), Sato et al.
patent: 4943952 (1990-07-01), Terayama et al.
patent: 4964084 (1990-10-01), Jung et al.

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