DRAM cell having MOS capacitor and method for manufacturing...

Details DRAM cell having MOS capacitor and method for manufacturing... DRAM cell having MOS capacitor and method for manufacturing...

2006-06-06

2006-06-06

Le, Thao P. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S243000

Reexamination Certificate

active

07056790

ABSTRACT:
A DRAM cell having a MOS capacitor and a method for manufacturing the same are disclosed. The DRAM cell includes: an active region of a semiconductor substrate; a MOS capacitor consisting of a plate node electrode which is a part of the active region, a storage node electrode having a T-shaped structure through a trench of the active region and an insulator thin film formed between the plate node electrode and the storage node electrode; a cell transistor having a gate insulating film and a gate electrode which are formed on the top surface of the active region and a source/drain formed within the active region; an interlayer insulating film deposited on a structure with the MOS capacitor and the cell transistor; a contact electrode connected with the source/drain of the cell transistor or with the storage node electrode of the MOS capacitor through a contact hole of the interlayer insulating film; a wire connected with the drain and the storage node electrode through the contact electrode; and a bit line connected with the source through the contact electrode.

REFERENCES:
patent: 5895946 (1999-04-01), Hamamoto et al.
patent: 5910667 (1999-06-01), Hsu
patent: 6087212 (2000-07-01), Hirota
patent: 6172898 (2001-01-01), Kajiyama
patent: 6509244 (2003-01-01), Kim et al.

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