Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-08-07
1998-08-04
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438397, H01L 218242
Patent
active
057892911
ABSTRACT:
A process for fabricating stacked capacitor, DRAM devices, wherein the surface area of the capacitor is significantly increased as a result of sidewall processes, has been developed. The process is highlighted by deposition of polysilicon, to be used for the lower electrode of the stacked capacitor structure, on specific underlying insulator shapes. As a result of the severe underlying insulator topography, a significant portion of the polysilicon forms on the sides of the underlying insulator shapes, creating a significant increase in the lower electrode surface area, which relates to marked increases in capacitance and device signal.
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Ackerman Stephen B.
Bowers Jr. Charles L.
Saile George O.
Thomas Toniac
Vanguard International Semiconductor Corporation
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