Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-11-28
2006-11-28
Brewster, William M. (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S348000, C257S357000, C257SE29275
Reexamination Certificate
active
07141854
ABSTRACT:
A method of forming a double-gated transistor having a rounded active region to improve GOI and leakage current control comprises the following steps, inter alia. An SOI substrate is patterned and a rounded oxide layer is formed over the exposed side walls of a patterned upper SOI silicon layer. A dummy layer, having an opening defining a gate, is formed over the exposed patterned top oxide layer and the exposed portions of the upper SOI silicon layer. An undercut is formed into the undercut lower SOI oxide layer and the exposed gate area portion of the oxide layer is removed. The portion of the rounded oxide layer within the gate area is removed and a conformal oxide layer is formed over a part of the structure. A gate is formed within the second patterned dummy layer opening and the patterned dummy layer is removed to form the double gated transistor.
REFERENCES:
patent: 6365465 (2002-04-01), Chan et al.
patent: 6396108 (2002-05-01), Krivokapic et al.
patent: 6413802 (2002-07-01), Hu et al.
patent: 6451656 (2002-09-01), Yu et al.
Jin Da
Lee Yong Meng
Vigar David
Ackerman Stephen B.
Brewster William M.
Chartered Semiconductor Manufacturing Ltd.
Saile Ackerman LLC
Stanton Stephen G.
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