Double-gate FinFET device and fabricating method thereof

Details Double-gate FinFET device and fabricating method thereof Double-gate FinFET device and fabricating method thereof

2005-04-26

2005-04-26

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S618000, C257S619000, C257S620000

Reexamination Certificate

active

06885055

ABSTRACT:
The present invention relates to double-gate FinFET devices and fabricating methods thereof. More particularly, the invention relates to an electrically stable double-gate FinFET device and the method of fabrication in which the Fin active region on a bulk silicon substrate where device channel and the body are to be formed has a nano-size width and is connected to the substrate and is formed with the shape of a wall along the channel length direction.The conventional double-gate MOS devices are fabricated using SOI wafers which are more expensive than bulk silicon wafers. It also has problems including the floating body effects, larger source/drain parasitic resistance, off-current increase, and deterioration in heat transfer to the substrate.

REFERENCES:
patent: 6525403 (2003-02-01), Inaba et al.

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