Double gate field effect transistor and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S157000, C438S176000

Reexamination Certificate

active

07015106

ABSTRACT:
Provided is a double gate field effect transistor and a method of manufacturing the same. The method of manufacturing the double gate field effect transistor comprises forming as many fins as required by etching a silicon substrate, masking the resultant product by an insulating material such as silicon nitride, forming trench regions for device isolation and STI film by using the silicon nitride mask, forming gate oxide films on both faces of the fins after removing the hard mask, and forming a gate line. As such, unnecessary channel formation under the silicon oxide film, when a voltage higher than a threshold voltage is applied to the substrate, is prevented by forming a thick silicon oxide film on the substrate on which no protruding fins are formed.

REFERENCES:
patent: 6413802 (2002-07-01), Hu et al.
patent: 6642090 (2003-11-01), Fried et al.
patent: 6706571 (2004-03-01), Yu et al.
patent: 6770516 (2004-08-01), Wu et al.
patent: 6838322 (2005-01-01), Pham et al.
patent: 6858478 (2005-02-01), Chau et al.
patent: 2004/0217420 (2004-11-01), Yeo et al.
patent: 2005/0029583 (2005-02-01), Popp et al.
patent: 2005/0035415 (2005-02-01), Yeo et al.
patent: 0721221 (1996-07-01), None
patent: 2002-96654 (2002-12-01), None
patent: 2003-26435 (2003-04-01), None
patent: 2003-0065631 (2003-08-01), None
English language abstract of Korean Publication No. 2003-0065631.
English language Abstract of Korean Patent No. 2002-96654.
English language Abstract of Korean Patent No. 2003-26435.
“A Folded-channel MOSFET for Deepsubtenth Micron Era.” 1998 IEEE International Electron Device Meeting Technical Digest, pp. 1032-1034, by Hasimoto et al., and “Sub 50-m FinFET : PMOS,” 1999 IEEE International Electron Device Meeting Technical Digest, pp. 67-70 by Heang et al.

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