Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
2011-06-14
2011-06-14
Chang, Daniel D (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S098000, C326S119000, C327S212000
Reexamination Certificate
active
07961009
ABSTRACT:
The domino logic of the general inventive concept receives a feedback signal and an input signal and outputs any one of the feedback signal and the input signal as an output signal in response to an enable signal and a clock signal. The feedback signal is an output signal of a previous cycle of a clock signal. When an enable signal is a first level, the domino logic maintains an output signal of a previous cycle instead of an input signal. According to the present general inventive concept, the domino logic having a data hold function can be embodied.
REFERENCES:
patent: 5828234 (1998-10-01), Sprague
patent: 6968475 (2005-11-01), Rosen
patent: 7212039 (2007-05-01), Qureshi et al.
patent: 2000-278114 (2000-10-01), None
patent: 2001-196919 (2001-07-01), None
patent: 20050118352 (2005-12-01), None
patent: 20060002551 (2006-01-01), None
Chang Daniel D
Samsung Electronics Co,. Ltd.
Stanzione & Kim LLP
LandOfFree
Domino logic block having data holding function and domino... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Domino logic block having data holding function and domino..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Domino logic block having data holding function and domino... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2696095