Distributed caching mechanism for pending memory operations...

Details Distributed caching mechanism for pending memory operations... Distributed caching mechanism for pending memory operations...

2005-10-25

2005-10-25

Kim, Hong (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C709S223000, C709S202000, C711S154000, C711S158000, C711S168000, C710S240000

Reexamination Certificate

active

06959361

ABSTRACT:
One embodiment of the present invention provides a memory controller that contains a distributed cache that stores cache lines for pending memory operations. This memory controller includes an input that receives memory operations that are directed to an address in memory. It also includes a central scheduling unit and multiple agents that operate under control of the central scheduling unit. Upon receiving a current address, a given agent compares the current address with a cache line stored within the given agent. All of the agents compare the current address with their respective cache line in parallel. If the addresses match, the agent reports the result to the rest of the agents in the memory controller, and accesses data within the matching cache line stored within the agent to accomplish the memory operation.

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