Disguising test pads in a semiconductor package

Details Disguising test pads in a semiconductor package Disguising test pads in a semiconductor package

2011-03-08

2011-03-08

Zarneke, David A (Department: 2891)

Semiconductor device manufacturing: process

With measuring or testing

Electrical characteristic sensed

C438S612000

Reexamination Certificate

active

07901957

ABSTRACT:
A method of forming a semiconductor package is disclosed including disguising the test pads. Test pads are defined in the conductive pattern of the semiconductor package for allowing electrical test of the completed package. The test pads are formed in shapes such as letters or objects so that they are less recognizable as test pads.

REFERENCES:
patent: 6667719 (2003-12-01), LaKomski
patent: 7220915 (2007-05-01), Park et al.
patent: 7251880 (2007-08-01), Pearson et al.
patent: 2006/0055539 (2006-03-01), Lawrence et al.
patent: 2006004909 (2006-01-01), None

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