Electrical computers and digital data processing systems: input/ – Input/output data processing – Concurrent input/output processing and data transfer
Reexamination Certificate
2001-04-16
2004-09-21
Fleming, Fritz (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Concurrent input/output processing and data transfer
C710S006000, C710S007000, C710S021000, C710S022000, C710S033000, C710S036000
Reexamination Certificate
active
06795874
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to Direct Memory Accessing (DMA) in a data processing system generally, and more particularly, to a method and apparatus for performing single to multiple data shifts in a data processing system.
BACKGROUND OF THE INVENTION
Direct Memory Access (DMA) engines are known in the art and are implemented to automate the process of shifting data around a data bus. For example, DMA engines shift data between different memories within a data processing system without the intervention of the system processor (CPU). DMA engines eliminate the requirement for the CPU to perform each bus transaction (i.e., the movement of blocks of data from one location to another across the system bus). Therefore, DMA engines are implemented in a majority of microprocessor based data processing systems.
Conventional DMA technologies do not efficiently copy a set of data from one source to two or more destinations. Such an operation is required for MPEG video decoding systems, where video data is both processed and analyzed simultaneously. The processing and analysis cannot be carried out by the same processing block, therefore the data is required to be simultaneously copied to first and second processing blocks for data processing and analysis. Thus, two copies of the set of data are required to be operated upon in parallel in two distinct processing blocks. Although conventional DMA engines can be used to transfer such data to both processing blocks, the ability of conventional DMA engines to make multiple copies is inefficient. The duplication can only be achieved sequentially and not simultaneously, which introduces delays to the system. Conventional DMA engines are required to be set up and executed twice to copy one set of data to two locations. Thus, if a data processing system requires a block of data to be copied from a memory location (X) to both memory locations (Y) and (Z), the procedure for a conventional DMA engine is:
Read data from memory location X;
Write data to memory location Y;
Read data from memory location X;
Write data to memory location Z.
It will be appreciated that the above procedure is wasteful of bandwidth, since it is necessary to read from memory location X twice. Moreover, the system CPU is required to set up and execute the DMA engine separately for each destination memory location.
SUMMARY OF THE INVENTION
The present invention concerns a method of performing data shifts in a data processing system between a source and a plurality of destinations using a direct memory accessing scheme, comprising the steps of: (A) reading a data block from the source destinations; (B) writing the data block to a first of the plurality of destinations; and (C) writing the data block to a second of the plurality of destinations. Addresses of the first and second destinations are previously stored.
The steps of writing the data to the first and second destinations may be carried out sequentially or simultaneously. Additionally, the present invention may efficiently shift blocks of data around a data bus between memory locations.
Objects, features and advantages of the present invention include providing a method and/or apparatus for shifting blocks of data around a data bus between memory locations.
REFERENCES:
patent: 4467454 (1984-08-01), Kurosu et al.
patent: 4475155 (1984-10-01), Oishi et al.
patent: 4722051 (1988-01-01), Chattopadhya
patent: 5274795 (1993-12-01), Vachon
patent: 5444858 (1995-08-01), Wakerly
patent: 5634042 (1997-05-01), Kashiwagi et al.
patent: 6230241 (2001-05-01), McKenney
patent: 6260082 (2001-07-01), Barry et al.
patent: 6611895 (2003-08-01), Krull et al.
“Multi-Channel DMA with Scheduled Ports”, Laurent Six, et al., Dec. 13, 2000, European Patent Application publication EP 1 059 589 A1.
“Vorrichtung zur Mikroprogramm-Steuerung eines Informationstransfers und Verfahren zu ihrem Betrieb”, Hans Stadlmeier, et al., May 15, 1984, European Patent Application publication EP 0 108 418 A2.
Martin Gregor J.
Pether David N.
Williams Kalvin
Farooq Mohammad O.
Fleming Fritz
LSI Logic Corporation
Maiorana P.C. Christopher P.
LandOfFree
Direct memory accessing does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Direct memory accessing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Direct memory accessing will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3206167