Direct BGA attachment without solder reflow

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – By pressure alone

Reexamination Certificate

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C257S712000, C257S713000, C257S718000, C257S727000, C257S731000, C257S733000, C257S737000, C257S780000, C257S717000, C257S738000, C257S719000, C257S778000

Reexamination Certificate

active

06750551

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to apparatus and processes for packaging microelectronic device. In particular, the present invention relates to a packaging technology that utilizes compression for achieving a BGA surface mount-type electrical connection between a microelectronic device and a carrier substrate.
2. State of the Art
A variety of techniques are known in the art for attaching microelectronic devices (such as microprocessors, circuit components, and the like) to carrier substrates (such as motherboards, expansion cards, and the like). These techniques may include direct surface mounting of the microelectronic device to the carrier substrate and socket mounting of the microelectronic device. Socket mounting may comprise a socket mounted on the carrier substrate wherein the microelectronic device is attached to the socket by pins protruding from the microelectronic device, or wherein the microelectronic device is pressed into the socket to achieve electrical continuity between a plurality of lands on the microelectronic device and a plurality of terminals on the socket. However, in low profile applications, such as laptop computers, the height of the attachment of the microelectronic device must be minimized. Thus, sockets are usually not utilized because the socket adds an unacceptable amount of height to the assembly. Thus, for low profile applications, direct surface mounting is generally used.
FIG. 5
illustrates an exemplary surface mounted land grid array
200
comprising a microelectronic device package
208
including a microelectronic device
202
attached to and in electrical contact with a first surface
206
of an interposer substrate
204
. The attachment and electrical contact may be achieved through a plurality of small solder balls
212
extending between contacts
214
on the microelectronic device
202
and contacts
216
on the interposer substrate first surface
206
. An underfill material
218
may be disposed between the microelectronic device
202
and the interposer substrate
204
to prevent contamination. Further, a thermal interface (shown as heat slug
222
) for dissipation of heat generated by the microelectronic device
202
during operation may be attached thereto. The interposer substrate first surface contacts
216
are in discrete electrical contact with contacts
224
on a second surface
226
of the interposer substrate
204
through a plurality of conductive traces (not shown) extending through the interposer substrate
204
.
The electrical contact of the microelectronic package
208
to a carrier substrate (such as a motherboard)
232
is achieved with a plurality of solder balls
234
which extend discretely between the interposer substrate second surface contacts
224
and contacts
236
on a first surface
238
of the carrier substrate
232
. The solder balls
234
are reflowed (i.e., melted) which attaches the interposer substrate
204
to the carrier substrate
232
. This form of electrical attachment is called a ball grid array (“BGA”) attachment. The carrier substrate
232
includes conductive traces therein and/or thereon (not shown) which form electrical pathways to connection the first surface contacts
236
with external components (not shown).
The microelectronic device
202
and the interposer substrate
204
may be supported by a support structure
242
. The support structure
242
includes a frame
244
, a backing plate
246
, a thermal plate
248
, and a plurality of retention devices (shown as bolts
252
and nuts
254
). The backing plate
246
is placed adjacent a second surface
256
of the carrier substrate
232
. The frame
244
is placed adjacent to the carrier substrate first surface
238
and at least partially surrounds the microelectronic package
208
. The thermal plate
248
abuts the heat slug
222
and extends over the frame
244
. The bolts
252
extend through the backing plate
246
, the frame
244
, and the thermal plate
248
, and are retained by nuts
254
threaded thereon. The frame
244
not only acts to support the assembly, but also acts as a stop to prevent overtightening of the retention devices, which could damage the microelectronic device. The thermal plate
248
is generally thermally conductive to assist the heat slug
222
in removing heat generated by the operation of microelectronic device
202
.
Although the surface mounted land grid array
200
shown in
FIG. 4
achieves a low profile, the attachment of the microelectronic device package
208
to the carrier substrate
232
by reflowing of the solder balls
234
makes it difficult to remove the microelectronic device package
208
after attachment. This, in turn, makes it difficult to replace a defective microelectronic device (resulting in high rework costs) and makes it difficult for an end user or retailer to upgrade the microelectronic device.
Therefore, it would be advantageous to develop new apparatus and techniques to provide a low profile microelectronic device attachment which allows for easy removal of the microelectronic device.
SUMMARY OF THE INVENTION
The present invention relates to a packaging technology that achieves a BGA surface mount-type electrical connection between a first substrate and a second substrate by pressure on the BGA solder balls rather than by the reflow thereof. An embodiment of the present invention includes a microelectronic component assembly comprising a first substrate having at least one contact and a second substrate having at least one contact. At least one solder ball extends between the first substrate contact and the second substrate contact, wherein the solder ball is attached to the first substrate contact. A compression mechanism imparts pressure between the first substrate and the second substrate.


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patent: 5400220 (1995-03-01), Swamy
patent: 5625298 (1997-04-01), Hirano et al.
patent: 5634267 (1997-06-01), Farnworth et al.
patent: 5714803 (1998-02-01), Queyssac
patent: 5736456 (1998-04-01), Akram
patent: 5783461 (1998-07-01), Hembree
patent: 5786635 (1998-07-01), Alcoe et al.
patent: 5812378 (1998-09-01), Fjelstad
patent: 5834335 (1998-11-01), Buschbom
patent: 5907474 (1999-05-01), Dolbear
patent: 5931685 (1999-08-01), Hembree et al.
patent: 5947751 (1999-09-01), Massingill
patent: 5949137 (1999-09-01), Domadia et al.
patent: 6137161 (2000-10-01), Gililand et al.
patent: 10303345 (1998-11-01), None
patent: 95/26851 (1995-10-01), None

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