Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-06-14
2005-06-14
Pham, Hoai (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S311000
Reexamination Certificate
active
06905924
ABSTRACT:
In an SOI diode structure, the conventional transistor-like MOS configuration is eliminated by replacing the polysilicon line by a completely dielectric region. This region may be used as an implantation mask to control a dopant gradient of a PN-junction that forms below the dielectric region. Moreover, during the salicide process, the dielectric region prevents the PN-junction from being shorted. Thus, a depletion of the active region caused by the MOS structure may be avoided. Therefore, the functioning of the PN-junction is maintained even for extremely thin semiconductor layers.
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patent: 4616404 (1986-10-01), Wang et al.
patent: 6103564 (2000-08-01), Masuda
patent: 2002/0063288 (2002-05-01), Maciejewski et al.
patent: 0 923 132 (1999-06-01), None
patent: WO 02/061841 (2002-08-01), None
Burbach Gert
Feudel Thomas
Horstmann Manfred
Advanced Micro Devices , Inc.
Pham Hoai
Williams Morgan & Amerson P.C.
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