Electric lamp and discharge devices: systems – Cathode ray tube circuits – Cathode-ray deflections circuits
Reexamination Certificate
2001-05-07
2002-05-21
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Cathode ray tube circuits
Cathode-ray deflections circuits
C315S368110, C315S368120, C315S368280, C348S807000
Reexamination Certificate
active
06392369
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to integrated circuits, and more particularly, to a digital, realtime convergence correction circuit and a method thereof.
2. Discussion of Related Art
Convergence correction for color televisions and computer monitors has heretofore been performed largely in analog, using a correction signal generated from the horizontal and vertical deflection signals.
As the television or monitor screen size gets larger, the distance between the projector and the screen increases. Thus, the image becomes diffuse. Further, the screen surface of a 3-tube type color television set becomes rough, and the allowable range of misconvergence becomes narrow. Therefore, a convergence correction apparatus is needed. Accordingly, for conventional projector-type color television sets, in which the convergence is corrected in an analog process, a plurality of control means may be needed in order to correct the convergence of various configurations.
For example, if the shape of the projection screen of a 3-tube type project-type color television set changes, that is, the aspect ratio changes, the characteristics of the convergence changes accordingly. Therefore, readjustment of the convergence may be needed. Also, in the case of correcting the convergence in an analog process, in order to cope with various aspect ratios, it has been proposed to use a separate set of manual controls. However, if such proposal is adapted, additional control means for the convergence correction may be needed with respect to various screen sizes.
One proposal for correcting the convergence in a digital process is described in the U.S. Pat. No. 4,754,204.
FIG. 1
, of the '204 patent shows data needed in the convergence correction being stored in a field memory
1
and the data being read by an address encoder
2
. The data output from the field memory
1
is converted into an analog signal through a digital-analog converter
8
and provided to a drive amplifier
9
. The output of the drive amplifier
9
is provided to a correction coil
10
and corrects the convergence. However, since the system of the '204 patent needs a field memory
1
for storing data corresponding to a field, the degree of integration is lowered. Also, the prior art system may not be capable of handling the changes in the frequency of a system clock, in the size of a screen, or in distance between the projector and screen.
Therefore, a convergence correction circuit which digitally corrects the convergence in realtime and can cope with different configurations is needed.
SUMMARY OF THE INVENTION
To solve the above problems, it is an object of the present invention to provide a digital, realtime convergence correction circuit. It is another object of the present invention to provide a correction method for the convergence circuit.
To accomplish the above objects, a convergence correction circuit is provided, including a coordinate generating unit which sets a predetermined range with first level values in response to the length of a screen. The convergence correction circuit further includes an interval determining unit which divides the length of the screen in a predetermined number of intervals, and an interval decoder for calculating a value of a branch point of each interval determined by the interval determining unit. The convergence correction circuit includes an interval gain adjusting unit for storing the gain of each interval, a subtracter for subtracting the output of the coordinate generating unit from the output of the interval decoder, and a multiplier for multiplying the output of the subtracter by the output of the interval gain adjusting unit. The convergence correction circuit also includes a level shifter which sets an initial value and a last value of each interval when a horizontal scanning starts, and an adder which adds the output of the multiplier and the output of the level shifter. Further still, the convergence correction circuit includes and a digital-analog converter which converts the output of the adder into an analog value, and a correction coil which corrects the screen convergence with respect to the value output from the digital-analog converter.
Preferably, the length of the screen is a cycle of a horizontal synchronization signal or a vertical synchronization signal, and the coordinate generating unit changes the first level values with respect to the size of the screen. The interval determining unit divides the screen into a predetermined number of parts, and the interval decoder sets the value of the branch point of each interval so that the value of the branch point of each interval is the same as the first level value in the branch point. The interval gain adjusting unit receives the gain of each interval provided from the outside, and the gain of each interval has an arbitrary value for each neighboring interval.
To accomplish an object of the present invention, there is also provided a convergence correction method. The method (a) sets a predetermined range formed of the first level values for a cycle of a horizontal synchronization signal and a vertical synchronization signal, and (b) divides a cycle of the horizontal synchronization signal and vertical synchronization signal in a predetermined number of intervals. The method further (c) sets a value of a branch point of each interval so that the value of the branch point of each interval is the same as the first level value at the branch point, (d) storing the gain of each interval, (e) subtracting the value of the branch point of each interval of the step (C) from the first level range of the step (a), (f) multiplying the output of the step (e) by the gain of each interval in the step (d), (g) converting the output of the step (f) into an analog value, and (h) correcting the convergence of the screen with respect to the output value of the step (g).
Preferably, according to the convergence correction method, after the step (f), further has the steps of (i) setting an initial level value when horizontal/vertical synchronization starts, and (ii) storing the output of the step (f) at the branch point of each interval, and adding the stored output to the output of the step (f) at other point which is not branch point.
According to the present invention, since the convergence can be digitally corrected in realtime, and the coordinates range can be varied with respect to the size of a screen, the convergence can be stably corrected, regardless of the size of a screen, and even for changes in screen position. Also, since a slope for setting the value of a first level can change with respect to changes in horizontal/vertical synchronization signal, the system and method can cope with changes in the frequency of an input horizontal/vertical synchronization signal.
REFERENCES:
patent: 4754204 (1988-06-01), Ando et al.
patent: 4980614 (1990-12-01), Yamada et al.
patent: 5345280 (1994-09-01), Kimura et al.
patent: 5497054 (1996-03-01), Ryu
patent: 6288758 (2001-09-01), Chujo
F. Chau & Associates LLP
Samsung Electronics Co,. Ltd.
Tran Thuy Vinh
Wong Don
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