Digital processor with programmable breakpoint/watchpoint...

Details Digital processor with programmable breakpoint/watchpoint... Digital processor with programmable breakpoint/watchpoint...

2006-03-07

2006-03-07

Pan, Daniel H. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Specialized instruction processing in support of testing,...

C714S035000

Reexamination Certificate

active

07010672

ABSTRACT:
A digital processor having a programmable breakpoint/watchpoint (BWP) trigger circuit that generates BWP triggers in response to user-defined combinations and/or sequences of trigger events. Several trigger event detection registers generate pre-trigger signals when stored trigger values (e.g., instruction addresses or data addresses/values) match addresses/values transmitted on busses within the processor core. Sum-of-products circuits generate intermediate combinational trigger signals in accordance with user-defined combinations of the pre-trigger signals. A finite state machine generates an intermediate sequential trigger signal in response to user-defined sequences of the intermediate combinational trigger signals. Either the intermediate combinational trigger signals or the intermediate sequential trigger signal are selectively passed to an action generator, which transmits an associated breakpoint or watchpoint trigger signal to a decode stage of the processor core or other destination.

REFERENCES:
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patent: 5664159 (1997-09-01), Richter et al.
patent: 5704034 (1997-12-01), Circello
patent: 5754839 (1998-05-01), Pardo et al.
patent: 5889981 (1999-03-01), Betker et al.
patent: 5995992 (1999-11-01), Eckard

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