Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2006-04-18
2006-04-18
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S185110, C365S185120, C365S207000, C365S210130
Reexamination Certificate
active
07031214
ABSTRACT:
A digital multibit non-volatile memory integrated system includes autozero multistage sensing. One stage may provide local sensing with autozero. Another stage may provide global sensing with autozero. A twisted bitline may be used for array arrangement. Segment reference may be used for each segment. The system may read data cells using a current sensing one or two step binary search. The system may use inverse voltage mode or inverse current mode sensing. The system may use no current multilevel sensing. The system may use memory cell replica sensing. The system may use dynamic sensing. The system may use built-in byte redundancy. Sense amplifiers capable of sub-volt (<<1V) sensing are described.
REFERENCES:
patent: 4471341 (1984-09-01), Sauer
patent: 4761765 (1988-08-01), Hashimoto
patent: 5191552 (1993-03-01), Nakai et al.
patent: 5717640 (1998-02-01), Hashimoto
patent: 5773997 (1998-06-01), Stiegler
patent: 5774405 (1998-06-01), Tomishima
patent: 5856748 (1999-01-01), Seo et al.
patent: 5864496 (1999-01-01), Mueller et al.
patent: 5986939 (1999-11-01), Yamada
patent: 5995421 (1999-11-01), McKenny
patent: 6002614 (1999-12-01), Banks
patent: 6081453 (2000-06-01), Iwahashi
patent: 6185256 (2001-02-01), Saito et al.
Dinh Son T.
DLA Piper Rudnick Gray Cary US LLP
Silicon Storage Technology, Inc.
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