Digital frequency synthesis clocked circuits

Details Digital frequency synthesis clocked circuits Digital frequency synthesis clocked circuits

2007-08-14

2007-08-14

Kerveros, James C (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

10815500

ABSTRACT:
Embodiments of the invention may include a reference input port to receive a reference clock, the reference clock being based on a bypass clock, a feedback input port to receive a feedback clock from a clocked circuit, and logic to compare the reference clock and the feedback clock and to generate an output based on the comparison.

REFERENCES:
patent: 6583679 (2003-06-01), Cox et al.
patent: 7002358 (2006-02-01), Wyatt

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