Diffusion region routing for narrow scribe-line devices

Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure

Reexamination Certificate

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Details

C038S110000, C038S033000, C257SE21214

Reexamination Certificate

active

07968431

ABSTRACT:
The present disclosure provides a method of making an integrated circuit (IC) device. The method includes forming a first IC feature and a second IC feature in a semiconductor substrate, the first and second IC features being spaced from each other and separated by a scribe region; forming, in the semiconductor substrate, a doped routing feature at least partially within the scribe region and configured to connect the first and second IC features; forming a multilayer interconnect (MLI) structure and an interlayer dielectric (ILD) on the semiconductor substrate, wherein the MLI is configured to be absent within the scribe region; and etching the ILD and the semiconductor substrate within the scribe region to form a scribe-line trench.

REFERENCES:
patent: 7598154 (2009-10-01), Izumi

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