Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-06-04
2010-11-23
Sefer, A. (Department: 2893)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S285000, C438S268000, C438S791000, C438S738000, C257SE21633, C257SE21636, C257SE21640, C257SE21642
Reexamination Certificate
active
07838355
ABSTRACT:
Disclosed are embodiments of an integrated circuit structure with field effect transistors having differing divot features at the isolation region-semiconductor body interfaces so as to provide optimal performance versus stability (i.e., optimal drive current versus leakage current) for logic circuits, analog devices and/or memory devices. Also disclosed are embodiments of a method of forming the integrated circuit structure embodiments. These method embodiments incorporate the use of a cap layer pullback technique on select semiconductor bodies and subsequent wet etch process so as to avoid (or at least minimize) divot formation adjacent to some but not all semiconductor bodies.
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Anderson Brent A.
Ku Suk Hoon
Nowak Edward J.
Gibb I.P. Law Firm LLC
International Business Machines - Corporation
Sefer A.
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