Differential alternating phase shift mask optimization

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C430S005000, C430S030000

Reexamination Certificate

active

07617473

ABSTRACT:
A method of designing a mask for projecting an image of an integrated circuit design in lithographic processing, wherein the integrated circuit layout has a plurality of segments of critical width. The method comprises creating a first mask design by aligning mask features used to assist in projecting critical width segments with the critical width segments of the integrated circuit design, such that the first mask design meets predetermined manufacturability design rules, and creating a second mask design by aligning mask features with the critical width segments of the integrated circuit design, such that the second mask design meets predetermined lithographic design rules in regions local to the critical width segments. The method then includes identifying design features of the second mask design that violate the predetermined manufacturability design rules, and then creating a third mask design derived from the second mask design wherein the mask features of the second mask design that violate the predetermined manufacturability rules are selectively replaced by mask features from the first mask design so that the third mask design meets the predetermined manufacturability design rules. By way of example, the mask features used to assist in projecting critical width segments may comprise alternating phase shifting regions or sub-resolution assist features.

REFERENCES:
patent: 6503666 (2003-01-01), Pierrat
patent: 6553560 (2003-04-01), Ma et al.
patent: 6569583 (2003-05-01), Cho et al.
patent: 6573010 (2003-06-01), Kling et al.
patent: 6692876 (2004-02-01), Baggenstoss
U.S. Appl. No. 10/707,962, filed Jan. 28, 2004 Applicant(s) Lars W. Liebmann, Zachary Baum Title: Alternating Phase Shift Mask Design For High Performance Circuitry Status: Pending.
U.S. Appl. No. 10/707,962, filed Jan. 28, 2004 of Liebmann et al.

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