Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-03-06
2010-12-28
Smith, Bradley K (Department: 2894)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S439000, C438S200000
Reexamination Certificate
active
07858466
ABSTRACT:
A method of manufacturing different-voltage devices mainly comprises forming at least one high-voltage well in high-voltage device regions, at least one N-well in low-voltage device regions, at least one P-well in low-voltage device regions, source/drain wells in high-voltage device regions, and isolation wells in isolation regions in a p-type substrate. The breakdown voltage is adjusted by modulating the ion doping profile. Furthermore, parameters of implanting conductive ions are adjusted for implanting conductive ions into both high-voltage device regions and low-voltage device regions. The isolation wells formed in isolation regions between devices are for separating device formed over high-voltage device regions and device formed over low-voltage device regions. The thickness of a HV gate oxide layer is thicker than the thickness of an LV gate oxide layer for modulating threshold voltages of high-voltage devices and low-voltage devices.
REFERENCES:
patent: 4874714 (1989-10-01), Eklund
patent: 5917222 (1999-06-01), Smayling et al.
patent: 6165846 (2000-12-01), Carns et al.
patent: 2004/0171197 (2004-09-01), Park
patent: 2005/0048723 (2005-03-01), Lee et al.
Chien Tuo-Hsin
Huang Chih-Feng
Lin Jenn-yu G.
Yang Ta-yung
J.C. Patents
Smith Bradley K
System General Corp.
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