Dielectric relaxation memory

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S067000, C257S068000, C257S310000, C361S111000, C361S112000, C438S171000, C438S190000, C438S210000

Reexamination Certificate

active

07453115

ABSTRACT:
A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy state. The energy states may be used to distinguish memory states for the capacitor structure, allowing the invention to be used as a memory device. A method of forming the trap cites involves an atomic layer deposition of a material at pre-determined areas in the dielectric layer.

REFERENCES:
patent: 2003/0072126 (2003-04-01), Bhattacharyya
patent: 2004/0004240 (2004-01-01), Nishikawa
patent: 2005/0063141 (2005-03-01), Jeong et al.
patent: 2005/0201141 (2005-09-01), Turner
H. Reisinger et al, “A comparative study of dielectric relaxation losses in alternative dielectrics”, Infineon Technologies, 2001, IEEE.
J. R. Jameson et al., “Problems with Metal-Oxide High-κDielectrics Due to 1/t Dielectric Relaxation Current in Amorphous Materials”, Stanford University, 2003, IEEE.
M. Schumacher et al., “Curie—Von Schweidler Behaviour Observed in Ferroelectric Thin Films and Comparison to Superparaelectric Thin Film Materials”, Integrated Ferroelectrics, 1998, pp. 109-121, vol. 22.
Cem Basceri et al., The dielectric response as a function of temperature and fim thickness of fiber-textured (Ba, Sr) (TiO3) thin films grown by chemical vapor deposition, J. Appl. Phys., Sep. 1, 1997, p. 2497, vol. 82(5).
Tsuyoshi Horikawa et al., “Dielectric Relaxation of (Ba, Sr) TiO3Thin Films”, J. Appl. Phys. (1995) pp. 5478-5482., vol. 34, Part 1, No. 9B.
M. Schumacher et al., “Dielectric Relaxation of Perovskite- Type Oxide Thin Films”, Integrated Ferroelectrics, 1995, vol. 34, pp. 231-245, vol. 10.

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