Die-level opto-electronic device and method of making same

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S025000, C438S064000, C438S613000, C257SE25032

Reexamination Certificate

active

07468288

ABSTRACT:
The invention includes a die-level opto-electronic device with a semiconductor die and a photonic device including a conductive structure formed in the die away from the edges of the die. The conductive structure is electrically connected to the photonic device. The device also includes an optically transparent laminate attached to overlay the photonic device. The invention also comprises a semiconductor wafer with a plurality of photonic devices exposed on a first surface and a plurality of conductive structures being exposed on a second surface opposing the first surface. The conductive structures are electrically connected to the photonic devices which are overlaid with an optically transparent laminate. The invention further includes methods of forming die-level opto-electronic devices and semiconductor wafers.

REFERENCES:
patent: 5621225 (1997-04-01), Shieh et al.
patent: 6322903 (2001-11-01), Siniaguine et al.
patent: 6498381 (2002-12-01), Halahan et al.
patent: 6607941 (2003-08-01), Prabhu et al.
patent: 6677235 (2004-01-01), Yegnashankaran et al.
patent: 6703689 (2004-03-01), Wada
patent: 6730459 (2004-05-01), Nishikawa et al.
patent: 6759687 (2004-07-01), Miller et al.
patent: 2003/0193078 (2003-10-01), Chungpaiboonpatana et al.
patent: 2003/0216010 (2003-11-01), Atlas
patent: 2003/0230805 (2003-12-01), Noma et al.
Reche, John, “Wafer Thinning and Thru-Silicon Vias: The Path to Wafer Level Packaging”, Tru-Si Technologies, IEEE/CPMT Meeting, Santa Clara, CA, May 10, 2000, 42 Pages.
Tru-Si Technologies, “Thru Silicon Interconnects”, 33 Pages.
Advanced Semiconductor Engineering Korea, Inc., “CMOS Image Sensor”, http://www.asekr.com/doc/ASE—korea—Image—Sensor—overview.pdf, pp. 4 and 5.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Die-level opto-electronic device and method of making same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Die-level opto-electronic device and method of making same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Die-level opto-electronic device and method of making same will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4038478

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.