Diagonal testing method for flash memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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C711S103000, C365S201000

Reexamination Certificate

active

07065689

ABSTRACT:
The present invention discloses a diagonal testing method for flash memories. The testing method regards the flash memory as several squares, and executes in the direction from top to bottom and from left to right. Each square is provided with a first diagonal in −45 degrees from the upper left to the lower right, and a second diagonal in +45 degrees from the lower left to the upper right. The present invention is to program the cells in the first diagonal or the second diagonal, and then read the cells except the first diagonal or the second diagonal; or, program the cells except the first diagonal or the second diagonal, and then read the cells in the first diagonal or the second diagonal so as to detect the disturb fault in the flash memories and normal memory fault models.

REFERENCES:
patent: 5954831 (1999-09-01), Chang
patent: 6212112 (2001-04-01), Naura et al.
patent: 6665214 (2003-12-01), Cheah et al.
“On comparing functional fault coverage and defect coverage formemory testing”Von-Kyoung et al. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Publication Date: Nov. 1999 vol.: 18, Issue: 11On pp. 1676-1683.
Yeh et. al, “Flash Memory Built-In Self Test Using March-Like Algorithms”.
Mohammad et al., “Testing Flash Memories”, (pp. 406-411), Jan. 2000.
Mohammad et al., “Flash Memory Disturbances: Modeling and Test” (pp. 1-9).

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