Diagnostic/control system using a multi-level I2C bus

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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Details

C710S120000, C710S120000, C710S120000

Reexamination Certificate

active

06233635

ABSTRACT:

CLAIM OF PRIORITY
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. §119 from an application for A DIAGNOSTIC/CONTROL SYSTEM USING A MULTI-LEVEL I
2
C BUS earlier filed in the Korean Industrial Property Office on the 10
th
of July 1997 and there duly assigned Ser. No. 32148/1997.
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a diagnostic/control system using a multi-level I
2
C bus. More specifically, the invention relates to a diagnostic/control system using a multi-level I
2
C bus which embodies the I
2
C bus in a multi I
2
C bus structure using a multiplexer, and which makes system diagnosis/control possible by virtue of connecting the I
2
C devices needed in system diagnosis with a I
2
C bus, irrespective of the number of device, by adding a control circuit.
2. Related Art
It is known in the art to connect a plurality of I
2
C bus master devices via a I
2
C bus to a plurality of other I
2
C bus master devices. It is also known in the art to connect a single bus master device via a I
2
C bus to a plurality of I
2
C bus slave devices. Finally, it is known in the art to connect a plurality of I
2
C bus master devices via a I
2
C bus to a plurality of I
2
C bus slave devices.
The latter arrangements enable the diagnosis/control of appropriate modules in each module of mini or large scale computers, and each bus master device is connected via bus cables. In this manner, an agent can manage an overall system.
However, a significant drawback of the prior arrangements resides in the fact that, in such arrangements, the number of bus devices which can be interconnected is limited. That is to say, there is a limitation as to the number of bus slave devices which can be connected in order to perform a system diagnosis/control function.
Therefore, there is a need for the development of a diagnostic/control system using a multi-level I
2
C bus in which the number of I
2
C bus devices which can be connected is not limited. There is also a need for the development of a diagnostic/control system using a multi-level I
2
C bus in which the diagnosis/control function of the system is not limited by any limitation on the number of I
2
C bus slave devices.
The following patents are considered to be representative of the prior art, and are burdened by the disadvantages set forth herein: U.S. Pat. No. 5,754,807 to Lambrecht et al., entitled Computer System Including A Multimedia Bus Which Utilizes A Separate Local Expansion Bus For Addressing And Control Cycles, U.S. Pat. No. 5,682,484 to Lambrecht, entitled System And Method For Transferring Data Streams Simultaneously On Multiple Buses In A Computer System, U.S. Pat. No. 5,627,965, entitled Method And Apparatus For Reducing The Effects Of Hardware Faults In A Computer System Employing Multiple Central Processing Modules, U.S. Pat. No. 5,604,918 to Hijsing et al., entitled Two-Line Mixed Analog/Digital Bus System And A Master Station And A Slave Station For Use In Such System, U.S. Pat. No. 5,598,538 to Cooper, entitled SCSI Multiplexer For Coupling A Computer Local Bus To A Shared Peripheral Global Bus, U.S. Pat. No. 5,555,372 to Tetreault et al, entitled Fault-Tolerant Computer System Employing AN Improved Error-Broadcast Mechanism, U.S. Pat. No. 5,522,050 to Amini et al, entitled Bus-To-Bus Bridge For A Multiple Bus Information Handling System That Optimizes Data Transfers Between A System Bus And A Peripheral Bus, U.S. Pat. No 5,448,703 to Amini et al., entitled Method And Apparatus For Providing Back-To-Back Data Transfers In AN Information Handling System Having A Multiplexed Bus, U.S. Pat. No. 5,376,928 to Testin, entitled Exchanging Data And Clock Lines On Multiple Format Data Buses, U.S. Pat. No. 4,825,438 to Bennett et al., entitled Bus Error Detection Employing Parity Verification, and U.S. Pat. No. 4,610,016 to Long et al., entitled Remote Multiplexer Terminal With Redundant Central Processor Units.
SUMMARY OF THE INVENTION
Therefore, in order to solve said problems, the object of the present invention is to provide a diagnostic/control system using a multi-level I
2
C bus comprising: multiple I
2
C bus master devices (MD
0
to MDn) connected to a primary I
2
C bus; a I
2
C bus multiplexer module, which separates multiple secondary I
2
C buses from the primary I
2
C bus, and which can connect as many I
2
C bus slave devices (SD
00
to SD
0
N, SD
10
to SD
1
N, . . . , SDN
1
to SDNN) as are necessary on the secondary I
2
C bus; I
2
C bus slave devices (SD
00
to SD
0
N, SD
10
to SD
1
N, SDN
1
to SDNN) which, at any instant, can be accessed on a secondary bus by the I
2
C bus master devices (MD
0
to MDn).
In one preferred mode, in accordance with the invention, it is preferable that a diagnostic/control system using a multi-level I
2
C bus includes multiple I
2
C bus master devices (MD
0
to MDn) connected to a primary I
2
C bus; a I
2
C bus multiplexer module which separates multiple secondary I
2
C buses from the primary I
2
C bus, and which can connect with as many I
2
C bus slave devices (SD
00
to SD
0
N, SD
10
to SD
1
N, . . . , SDN
1
to SDNN) as necessary on the secondary I
2
C bus; I
2
C bus slave devices (SD
00
to SD
0
N, SD
10
to SD
1
N, SDN
1
to SDNN) which, at any instant, can be accessed on a secondary I
2
C bus by each of the I
2
C bus master devices (MD
0
to MDn).


REFERENCES:
patent: 4610013 (1986-09-01), Long et al.
patent: 4825438 (1989-04-01), Bennett et al.
patent: 5376928 (1994-12-01), Testin
patent: 5448703 (1995-09-01), Amini et al.
patent: 5522050 (1996-05-01), Mini et al.
patent: 5555372 (1996-09-01), Tetreault et al.
patent: 5598538 (1997-01-01), Cooper
patent: 5604918 (1997-02-01), Huijsing et al.
patent: 5627965 (1997-05-01), Lindell et al.
patent: 5682484 (1997-10-01), Lambrecht
patent: 5754807 (1998-05-01), Lambrecht et al.
patent: 11096090 (1999-04-01), None

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