Active solid-state devices (e.g. – transistors – solid-state diode – With means to increase breakdown voltage threshold – Field relief electrode
Patent
1998-03-20
2000-05-16
Prenty, Mark V.
Active solid-state devices (e.g., transistors, solid-state diode
With means to increase breakdown voltage threshold
Field relief electrode
257490, H01L 2358
Patent
active
060641037
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The invention is directed to an arrangement with a junction from a p-doped zone to an n-doped zone according to the preamble of claim 1.
An arrangement of said species is known from Intern. Electron Devices Meeting, Techn. Digest, San Francisco, Calif., 13-15 December 1982, pages 72 through 75 and is suitable for blocking voltages of 1040 Volts.
In semiconductor components with a pn-junction for medium and high blocking voltages, it is necessary to undertake measures where the blocking pn-junction comes to the surface of the body of semiconductor material that reduce or entirely eliminate the risk of an electrical arc-over or of a breakdown of the pn-junction.
Given diodes, particularly power diodes, and bipolar transistors with isolated gate (IGBTs, IGBT standing for Isolated Gate Bipolar Transistor) for a blocking voltage of 1000 Volts, a measure according to IEEE Transactions on Electron Devices, Vol. 40, No. 10, pp. 1845 through 1854 (1993) for reducing the risk of an electrical arc-over or breakdown of the pn-junction formed in a body of semiconductor material, this pn-junction being a junction between a p-doped zone fashioned in this body at the surface thereof and an n-doped zone of the body adjoining this zone, is that having a multi-step edge section offset from the surface over a contour of this p-doped zone that limits the p-doped zone at the surface, and p-doped zone in the region of the n-doped zone, said multi-step edge section lying opposite and spaced from the edge section of the electrode arranged in the region of the p-doped zone and being offset from the surface.
The body of semiconductor material is composed, for example, of silicon and the electrodes are composed, for example, of aluminum or polysilicon.
The space required for this measure in the direction of the spacing between the edge regions of the electrodes amounts to approximately 350 .mu.m.
The step heights in the multi-step edge regions are determined by the thickness of electrically insulating material, for example oxide layers, lying under the multi-step edge sections and between these sections and is limited to an overall thickness of about 10 .mu.m for process-oriented reasons.
Each step of the multi-step edge section of the electrode arranged in the region of the p-doped zone generates an electrical field peak in the semiconductor material that is in turn blunted by the respectively following part of this electrode, so that this electrode can be interpreted as a field plate which is intended to effect that optimally no electrical field peaks occur in the body of semiconductor material.
The electrode arranged outside the p-doped zone in the region of the n-doped zone can be interpreted as a stop electrode that is intended to effect that a space charge zone does not spread farther in the body of semiconductor material.
The reduction of the blocking capability by the field peaks generated by the steps of the edge section field plate [sic] should be as slight as possible, which requires a good matching of the step height of every step measured perpendicular to the surface of the body and step length of every step measured parallel to this surface in the direction away from the p-doped zone. The field peak at a free end of the edge section of this electrode can no longer be reduced, as described, and therefore limits the maximally possible blocking capability of the body given a prescribed thickness of the layer of electrically insulating material, i.e. given a prescribed spacing of this free end from the surface.
Two field plate-protected field rings are therefore additionally introduced for components having a pn-junction for 1600 Volts blocking voltage, but these require much space, for example 650 .mu.m. Such an arrangement becomes more and more unfavorable for even high blocking voltages.
Another proposed possibility of a measure for reducing the risk of an electrical arc-over or breakdown of a pn-junction is comprised of a junction extension technique (=JTE technique, JTE standing for Junctio
REFERENCES:
patent: 4605948 (1986-08-01), Martinelli
patent: 5381031 (1995-01-01), Shibib
International Electron Devices Meeting, (1982) Technical Digest, San Francisco, CA, XP002022571, Nakagawa et al, A 1000 V High Voltage P-Channel DSAMOS-IC, pp. 72-75, Dec. 1982.
IEEE Transactions on Electron Devices, vol. 40, No. 10, (1993) J. Korec et al, Comparison of DMOS/IGBT--Compatible High-Voltage Termination Structures and Passivation Techniques, pp. 1845-1854, Oct. 1993.
Patent Abstracts of Japan, vol. 005, No. 176, (E-081), Nov. 12, 1981 & JP 56-103463 (Nippon Denso Co. Ltd.), Aug. 18, 1981.
Prenty Mark V.
Siemens Aktiengesellschaft
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