Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-05-01
2007-05-01
Vu, Hung (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S900000
Reexamination Certificate
active
09477764
ABSTRACT:
A method and device for improved salicide resistance in polysilicon gates under 0.20 μm. The several embodiments of the invention provide for formation of gate electrode structures with recessed and partially recessed spacers. One embodiment, provides a gate electrode structure with recessed thick inner spacers and thick outer spacers. Another embodiment provides a gate electrode structure with recessed thin inner spacers and recessed thick outer spacers. Another embodiment provides a gate electrode structure with thin inner spacers and partially recessed outer spacers. Another embodiment provides a gate electrode structure with two spacer stacks. The outermost spacer stack with recessed thin inner spacers and recessed thick outer spacers. The inner spacer stack within inner spacers and thin outer spacers. Another embodiment provides a gate electrode structure with two spacer stacks. The outermost spacer stack with recessed thin inner spacers and recessed thick outer spacers. The inner spacer stack with recessed thin inner spacers and recessed thin outer spacers.
REFERENCES:
patent: 4716131 (1987-12-01), Okazawa et al.
patent: 4876213 (1989-10-01), Pfiester
patent: 4912061 (1990-03-01), Nasr
patent: 5290720 (1994-03-01), Chen
patent: 5468986 (1995-11-01), Yamanashi
patent: 5573965 (1996-11-01), Chen et al.
patent: 5696012 (1997-12-01), Son
patent: 5726479 (1998-03-01), Matsumoto et al.
patent: 5739573 (1998-04-01), Kawaguchi
patent: 5741736 (1998-04-01), Orlowski et al.
patent: 5783475 (1998-07-01), Ramaswami
patent: 5783479 (1998-07-01), Lin et al.
patent: 5847428 (1998-12-01), Fulford, Jr. et al.
patent: 5882973 (1999-03-01), Gardner et al.
patent: 5920783 (1999-07-01), Tseng et al.
patent: 6071782 (2000-06-01), Maa et al.
patent: 6180988 (2001-01-01), Wu
patent: 6191462 (2001-02-01), Chen-Hua
patent: 6271563 (2001-08-01), Yu et al.
patent: 6287924 (2001-09-01), Chao et al.
patent: 62-143473 (1987-06-01), None
Nakayama, T., et al., “Excellent Process Control Technology for Highly Manufacturable and High Performance 0.18 mm CMOS LSIs” 1998 IEEE, 1998 Symposium on VLSI Technology Digest of Technical Papers, pp. 146-147.
International Search Report, PCT/US99/26175, Apr. 4, 2000.
International Search Report, PCT/US 99/26175, Nov. 4, 1999.
Ghani Tahir
Jan Chia-Hong
Keating Steven J.
Myers Alan
Tsai Julie A.
Chen George
Intel Corporation
Vu Hung
LandOfFree
Device having recessed spacers for improved salicide... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Device having recessed spacers for improved salicide..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Device having recessed spacers for improved salicide... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3724318