Electric lamp and discharge devices: systems – Cathode ray tube circuits – Cathode-ray deflections circuits
Reexamination Certificate
2002-02-06
2003-07-08
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Cathode ray tube circuits
Cathode-ray deflections circuits
C315S397000
Reexamination Certificate
active
06590353
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority from prior French Patent Application No. 0101839, filed Feb. 7, 2001, the disclosure of which is hereby incorporated by reference in its entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the field of devices for the control of a circuit for the deflection of a spot on a screen and more particularly the present invention relates to a circuit for the vertical deflection of a spot scanning on a screen, especially for television screens and computer screens using class D amplifiers.
2. Description of Related Art
Generally, the spot scans the screen in two orthogonal directions, typically a horizontal direction and a vertical direction. Horizontal or line scanning consists of shifting the spot from left to right and then making a line return at the end of the line to go to the next line. Simultaneously, in vertical scanning, the screen is scanned from top to bottom. When the spot reaches the bottom of the screen, a flyback is done to bring the spot to the top of the screen to begin the next scan. The vertical deflection of the spot therefore comprises an outbound or forward phase of vertical scanning (from top to bottom) and a phase for the fast flyback of the spot. This vertical deflection of the spot is preformed by placing the spot in a magnetic field created by one or more vertical deflection coils as part of a vertical deflection control circuit.
One device used in the control circuits for the vertical deflection of a spot scan on a screen is class AB (linear) or class D amplifiers. Class AB amplifiers are amplifiers whose output stage comprises transistors working in their linear zone and producing a quasi-DC voltage for this purpose. Class D amplifiers are amplifiers whose output stage comprises transistors working alternately in their saturation zone and in their cut-off zone so as to generate a “square-wave” voltage (an alternation of high and low levels). The high frequency components of this “square-wave” voltage are then filtered to obtain the mean value of the voltage.
The role of these amplifiers is to amplify an instructed-value signal, generally a sawtoothed signal, in order to deliver a vertical scanning control signal as shown in FIG.
1
. The amplifier delivers a linear voltage ramp (the voltage decreases from +V
M
to −V
M
) during the forward phase of the vertical scanning and delivers an overvoltage VF of several tens of volts (preferably 70 to 75 volts) during the spot flyback phase to ensure a fast spot flyback.
One control for a class D amplifier is described in a vertical deflection control circuit in the French patent application No. 9900715, with inventor Philippe Maige and commonly assigned with STMicroelectronics SA Société anonyme, and incorporated by reference in its entirety.
FIGS. 2
,
3
and
4
of the present invention are taken from the French patent application 9900715.
FIG. 2
illustrate a diagram of the architecture of a vertical deflection circuit control device working as a class D device and
FIGS. 3 and 4
illustrate two possible embodiments of the output stage of this device. Referring to
FIG. 2
, the reference control device DCS gives a vertical scanning signal to the vertical deflection circuit referenced DV. The control device DCS has a pre-amplification stage PMP mounted as an inverter, an output stage BLS, control means PWM and detection means DTF to control the output stage, and a smoothing filter F. The pre-amplification stage PMP consists of an operational amplifier AO mounted as an inverter whose inverter input is connected to the input terminal BE of the control device by means of a resistor R
1
. This inverter input is also connected to the output of the operational amplifier AO by means of a resistor R
4
and secondly to a terminal BA of the vertical deflection circuit by means of a resistor R
2
. A low-value resistor R
3
grounds the terminal BA. The resistors R
1
and R
4
fix the gain of the pre-amplification stage and the resistors R
2
and R
4
fix the gain of the feedback loop. A reference voltage Ref which may be zero, is applied to the non-inverter input of the operational amplifier.
The operational amplifier AO delivers an error signal which is used by the control means PWM and the detection means DTF to control the output stage BLS. Referring to
FIG. 3
, the output stage BLS comprises an amplifier stage ETS formed by two NMOS type transistors T
1
and T
2
series-connected between the node N
1
and the negative terminal −Vcc of the main power supply of the control device. The common terminal of these two transistors is the output terminal BSS of the amplifier stage ETS. A diode D
1
(D
2
respectively) is mounted in an anti-parallel connection at the terminals of the transistor T
1
(T
2
respectively). That is, the anode of the diode D
1
(D
2
respectively) is connected to the source of the transistor T
1
(T
2
respectively) and the cathode of the diode D
1
(D
2
respectively) is connected to the drain of the transistor T
1
(T
2
respectively). The gates of the transistors T
1
and T
2
are controlled by opposite signals coming from the control means PWM. Hereinafter in the description, the control signal applied to the gate of the transistor T
1
is called a switching signal COM
T1
. The output terminal BSS of the amplifier stage ETS is connected to the output terminal BS of the control device by means of the smoothing filter F formed by an inductance coil and a capacitor.
The output stage BLS also has means MFB designed to control the generation of the overvoltage needed for the fast spot flyback. Referring to
FIG. 3
, the means MFB comprise a first two-way switch formed by an NMOS transistor T
3
whose source is connected to the drain of the transistor T
1
and whose drain is connected to a terminal BAL designed to receive a voltage VF delivered by an auxiliary power supply ALM. The means MFB also comprise a second two-way switch formed by an NMOS transistor T
4
whose drain is connected to the drain of the transistor T
1
and whose source is connected to the positive terminal +Vcc of the main power supply. A diode D
3
(D
4
respectively) is mounted in an anti-parallel connection at the terminals of the transistor T
3
(T
4
respectively). The transistors T
3
and T
4
are also controlled by the detection means DTF.
This control device works as follows. During the forward phase of vertical scanning, the control means PWM deliver control pulses (switching signal COM
T1
) to make the transistors T
1
and T
2
alternately conductive and non-conductive with a very high switching frequency, in the range of 100 KHz. During this phase, the transistor T
4
is conductive and the transistor T
3
is off.
During this phase, the duration of the control pulses, designed to make the transistor T
1
conductive, decreases from about 90% of the period of the switching signal to about 10% of the period of the switching signal. Conversely, the duration of the control pulses, designed to make the transistor T
2
conductive, increases from about 10% of the period of the switching signal to about 90% of the period of the switching signal. The voltage at the terminal BSS is filtered by the filter F to keep only the mean value.
It is important to note that, when the output voltage of the control device is zero, the control pulses of the switching signal take up about 50% of the switching period.
During the fast flyback phase of the spot, the control means PWM respectively make the transistors T
1
and T
2
conductive and non-conductive and the detection means DTF respectively make the transistors T
3
and T
4
conductive and non-conductive. The voltage VF given by the auxiliary power supply ALM is then delivered to the output terminal BS of the control device.
At present, the auxiliary power supply ALM used to generate the overvoltage is either external, i.e., external to the control device or internal, i.e., integrated into the control device. In the former
Guedon Yannick
Maige Philippe
Fleit Kain Gibbons Gutman & Bongini P.L.
Gibbons Jon A.
Jorgenson Lisa K.
STMicroelectronics S.A.
Tran Chuc D
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