Device for interfacing asynchronous data using...

Details Device for interfacing asynchronous data using... Device for interfacing asynchronous data using...

2005-03-08

2005-03-08

Tran, Denise (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S110000, C710S310000, C710S053000, C710S057000, C710S061000

Reexamination Certificate

active

06865654

ABSTRACT:
A device for interfacing asynchronous data, and more particularly, a device for interfacing asynchronous data using a first-in-first-out (FIFO) for preventing cutoff in data transfer by transferring the asynchronous data in accordance with a data transfer information signal while best satisfying a transfer request from a host between two devices that transfer the bi-directional asynchronous data. The provided device prevents control problems caused by the asynchronous data, so that the selected data is precisely and stably transferred even if the transfer speed is increased to equal that of an inner system clock. In addition, the output speed of a flag signal is faster than that of an existing method in which read and write addresses are compared, so that the remaining amount of data in the FIFO is precisely measured. As a result, asynchronous data is stably interfaced at a high speed.

REFERENCES:
patent: 5029124 (1991-07-01), Leahy et al.
patent: 5267263 (1993-11-01), Feezel et al.
patent: 5572676 (1996-11-01), Ohnishi
patent: 5781802 (1998-07-01), Cassetti
patent: 6286072 (2001-09-01), Bredin et al.

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