Device and method to carry out a viterbi-algorithm

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S794000, C714S796000, C375S341000, C375S262000

Reexamination Certificate

active

07127666

ABSTRACT:
An apparatus and method for executing a Viterbi algorithm includes initial state registers, at least one transition register, and an adder/subtracter network. Furthermore, evaluation units and a selection unit are provided for switching the apparatus between a first operating mode and a second operating mode. The selection unit can select different evaluation units depending on the selected operating mode.

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