Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-08-15
2006-08-15
Chace, Christian P. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S214000, C711S217000, C711S218000, C365S230030, C365S230040
Reexamination Certificate
active
07093085
ABSTRACT:
Disclosed is a device and method such that data of size S is stored in a memory of size K, a two-dimensional matrix with R rows and C columns, and interleaving indexes I are generated according to a predetermined interleaving rule to randomly output the data from the memory. If a first index I is greater than data size S, a second index is generated and output prior to outputting invalid data stored in the memory at the location of the first index.
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Chace Christian P.
Dilworth & Barrese LLP
Samsung Electronics Co,. Ltd.
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