Electrical computers and digital data processing systems: input/ – Access arbitrating
Reexamination Certificate
2011-08-23
2011-08-23
Cleary, Thomas J (Department: 2111)
Electrical computers and digital data processing systems: input/
Access arbitrating
C710S029000, C710S241000, C711S167000, C711S169000, C711S213000
Reexamination Certificate
active
08006015
ABSTRACT:
A device and a method for managing access requests, the method includes: (i) receiving, from a master component coupled to a master bus, multiple access requests to access a slave component over a pipelined slave bus; acknowledging a received access request if: (a) at least an inter-access request delay period lapsed from a last acknowledgement of an access request; (b) an amount of pending acknowledged access requests is below a threshold; wherein the threshold is determined in response to a pipeline depth of the pipelined slave bus; (c) the received access request is valid; wherein a validity of an access request is responsive to a reception of an access request cancellation request; and (ii) providing information from the slave component, in response to at least one acknowledged access request.
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Anschel Moshe
Devilla Yaki
Godin Kostantin
Gur Amit
Peled Itay
Cleary Thomas J
Freescale Semiconductor Inc.
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