Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
1997-09-16
2001-04-24
Wiley, David A. (Department: 2155)
Electrical computers and digital data processing systems: input/
Interrupt processing
C714S704000
Reexamination Certificate
active
06223245
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a device for generating an interrupt and, more particularly, to noise-insensitive device and method for generating an interrupt, which is suitable for efficient execution of a plurality of interrupts according to their priorities.
BACKGROUND OF THE INVENTION
In general, a microcomputer employs a microprocessor as a CPU for processing data and controlling the microcomputer, an input/output device for input/output of data, and a memory for storing programs and data. Thus, a single chip microcomputer, or microcomputer unit (MCU), is a computer in which the microcomputer is integrated onto a single chip.
A conventional device for generating an interrupt will be explained with reference to the attached drawings.
FIG. 1
illustrates a block diagram of the conventional device for generating an interrupt.
Referring to
FIG. 1
, the conventional device for generating an interrupt includes: a plurality of interrupt enabling parts
1
(e.g., each represented by a bit of a register, respectively); a plurality of interrupt demanding signal generating parts
2
; an interrupt priority determining part
3
(including a register having one bit for each generating part
2
); a bus
4
; and an MCU
5
. Interrupt sources include such things as a timer, a keyboard controller, a clock, a mouse, a math coprocessor, a disk drive and a communication part.
An interrupt enabling part
1
acts as a switch by which a corresponding interrupt demanding signal generator part can be turned ON/OFF by the MCU
5
. For example, the enabling part
1
controllably blocks/passes the signal generated by the generating part
2
. Each of the interrupt enabling parts
1
enables operation of the corresponding generating part
2
according to whether a bit is set or not in the enabling part
1
by the MCU
5
.
Each of the interrupt demanding signal generating parts
2
(if enabled by the corresponding enabling part
1
), upon reception of a signal from an interrupt source, generates an interrupt demanding signal and applies it to the MCU, and sets interrupt generating information bits corresponding to the interrupt source. When an interrupt demand, which is an interrupt demanding signal applied from a certain peripheral device to the CPU (i.e., the MCU) is generated, the MCU determines (by way of the interrupt priority determining part
3
) whether the interrupt demand should be processed according to an interrupt priority or neglected. If an interrupt has been permitted, an interrupt response(or permission signal) is given to the peripheral device, according to which the peripheral device issues an interrupt signal. The interrupt priority determining part
3
receives a plurality of signals from the interrupt demanding signal parts
2
for use in determining priorities of the interrupt signals. That is, when the MCU has set a particular interrupt enabling part
1
according to a program, the correspondingly-enabled interrupt demanding signal generating part
2
applies its interrupt demanding signal to the interrupt priority determining part
3
, thereby an interrupt of high priority is recognized and selected.
The operation of the conventional device for generating an interrupt having the aforementioned system will be explained.
Referring to
FIG. 1
, upon reception of signals from a plurality of interrupt sources, each of the interrupt demanding signal generating parts
2
, if enabled, sets its corresponding bit in the register of the priority determining part
3
, thereby ultimately causing an interrupt demanding signal to be sent to the MCU. Upon reception of a plurality of interrupt signals from the interrupt demanding signal generating parts
2
, i.e., having the corresponding bits set in its register, the interrupt priority determining part
3
generates a final interrupt signal to the MCU corresponding to the relatively highest priority interrupt source after having organized the bits set in its register, i.e., the interrupt demanding signals that the priority determining part
3
has received, according to a predetermined hierarchy.
However, the generating parts
2
cannot discriminate between noise on the line and a real signal from the interrupt source. Where a bit set by noise has a higher priority than a bit set by a real interrupt, the priority determining part will select the noise over the real signal. Consequently, the conventional device for generating an interrupt cannot avoid issuing a false interrupt corresponding to noise, because the device cannot discriminate noise from real interrupt signals.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to device and method for generating an interrupt that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a device and method for generating non-false interrupt demanding signals in order to permit the generation of non-false interrupts.
To achieve these and other advantages in accordance with the purpose of the present invention, as embodied and broadly described, in a microcomputer there is provided a device for discriminating between noise and real signals from interrupt sources so as to generate non-false interrupts. The device comprises: a plurality of signal generators for supplying indiscriminate interrupt demanding signals in response to signals from a plurality of interrupt sources, respectively; a plurality of counters for counting said indiscriminate interrupt demanding signals from the signal generators, respectively, to produce count values; a plurality of comparators for comparing reference values against said count values to produce authenticated interrupt demanding signals, respectively; and a priority determining unit for receiving said authenticated interrupt demanding signals, for determining priorities thereof, and for issuing interrupt signals according to said priorities.
In other aspects of the present invention, for a microcomputer to which interrupt sources are connected, there is provided a method for discriminating between noise and real signals from said interrupt sources so as to generate non-false interrupts, the method comprising the steps of: generating interrupt demanding signals in response to signals from said interrupt sources; counting said indiscriminate interrupting demanding signals for each interrupt source, respectively, to produce count values; comparing reference values against said count values, respectively, to discriminate between noise and real interrupt demanding signals and so produce authenticated interrupt demanding signals; determining priorities of said authenticated interrupt demanding signals; and issuing interrupt signals according to said priorities.
The foregoing and other objectives of the present invention will become more apparent from the detailed description given hereinafter. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments, are given by way of illustration only, because various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description and specific examples.
REFERENCES:
patent: 4961067 (1990-10-01), Suzuki
patent: 4962470 (1990-10-01), Hansen
patent: 5461345 (1995-10-01), Taki
patent: 5633742 (1997-05-01), Shipley
patent: 5727216 (1998-03-01), Takasu et al.
patent: 5812429 (1998-09-01), Downey et al.
patent: 5822726 (1998-10-01), Taylor et al.
Hyundai Electronics Industries Co,. Ltd.
Wiley David A.
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