Detection of row-to-row shorts and other row decode defects...

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S230060, C365S189110

Reexamination Certificate

active

11078764

ABSTRACT:
A system and method to detect row-to-row shorts and other row decode defects in memory devices and other electronic devices having a similar data storage functionality is disclosed. A selective switching between a normal large pull-up device and a smaller one in a wordline driver path allows limiting the current in the pull-up circuit to a low value so as to detect shorts because the shorts will cause the active wordline voltage level to drop, while a wordline without shorts will operate well. A GIDL (Gate Induced Drain Leakage) reduction circuit may be used as a pull-up circuit connected to supply a bias voltage to the wordline driver associated with a wordline being tested for shorts or other defects. A test signal may be selectively generated during testing so as to supply a lower strength voltage output of the GIDL circuit (the VccpRDec output) as the bias voltage to the wordline driver. The test signal, when latched, may limit the Vccp current (by generating VccpRDec) to the row to be tested so as to detect row-to-row shorts without disturbing the VNWL (negative wordline voltage) and to reduce unnecessary stress and the P-channel breakdown in the row decodes during burn-in testing of a memory chip. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

REFERENCES:
patent: 5633832 (1997-05-01), Patel et al.
patent: 6016281 (2000-01-01), Brox
patent: 6233185 (2001-05-01), Beffa et al.
patent: 6333882 (2001-12-01), Merritt et al.
patent: 6335893 (2002-01-01), Tanaka et al.
patent: 6349054 (2002-02-01), Hidaka
patent: 6356492 (2002-03-01), Raad
patent: 6795361 (2004-09-01), Joo
patent: 7009885 (2006-03-01), Pekny
patent: 2001/0021128 (2001-09-01), Kim
Kaushik Roy, Fellow IEEE, Saibal Mukhopadhyay, Student Member, IEEE, and Hamid Mahmoodi-Meimand, Student Member, IEEE, Leakage Current Mechanisms and Leakage Reduction Techniques in Deep-Submicrometer CMOS Circuits, Proceedings of the IEEE, Feb. 2003, pp. 305-327, vol. 91, No. 2.
Micron Technology, Inc., 256 Mb: ×4, ×8, ×16 DDR SDRAM, pp. 17-41, unknown date.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Detection of row-to-row shorts and other row decode defects... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Detection of row-to-row shorts and other row decode defects..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Detection of row-to-row shorts and other row decode defects... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3848065

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.