Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-10-31
2010-11-16
Torres, Joseph D (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S766000
Reexamination Certificate
active
07836380
ABSTRACT:
Embodiments of the invention are generally directed to systems, methods, and apparatuses for a destination indication to aid in posted write buffer loading. In some embodiments, a memory device includes a posted write buffer having a first element and a second element. The memory device may also include logic to detect a destination indication associated with received write data. In some embodiments, the logic determines whether to store the received write data in the first element or the second element based, at least in part, on the destination indication. Other embodiments are described and claimed.
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Intel Corporation
Pedigo Philip A.
Torres Joseph D
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