Design method for semiconductor integrated circuit...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S030000, C716S030000

Reexamination Certificate

active

11024470

ABSTRACT:
An impedance of a power supply wire is calculated based on design data of a semiconductor integrated circuit, a frequency characteristic of the calculated impedance is obtained, and a design of the semiconductor integrated circuit is changed based on the obtained frequency characteristic. As the above-described impedance, an impedance between power supplies that are different in potential such as a power supply and a ground may be calculated, or an impedance between power supplies that are substantially the same in potential such as a power supply and an N-well power supply may be calculated. By a design modification, a wiring method, the number of pads, separation of power supplies, a type of package, a characteristic of an inductance element, a substrate structure, a distance between wires, a decoupling capacitance, a length of a wire, and a characteristic of a resistance element, for example, are changed.

REFERENCES:
patent: 3683271 (1972-08-01), Kobayashi
patent: 4135590 (1979-01-01), Gaulder
patent: 6040610 (2000-03-01), Noguchi et al.
patent: 6523150 (2003-02-01), Buffet et al.
patent: 6532439 (2003-03-01), Anderson et al.
patent: 6754598 (2004-06-01), Shimazaki et al.
patent: 7015774 (2006-03-01), Terakawa et al.
patent: 2002/0011885 (2002-01-01), Ogawa et al.
patent: 2002/0147553 (2002-10-01), Shimazaki et al.
patent: 2002/0147555 (2002-10-01), Nagata et al.
patent: 2003/0057966 (2003-03-01), Shimazaki et al.
patent: 2003/0058060 (2003-03-01), Yamamoto
patent: 2005/0156663 (2005-07-01), Shinichi
patent: 2006/0220772 (2006-10-01), Suzuki et al.
patent: 1107139 (2001-06-01), None
patent: 2001-175702 (2001-06-01), None
patent: 2001-202400 (2001-07-01), None
patent: A-2001-222573 (2001-08-01), None
patent: 2003-030273 (2003-01-01), None
patent: 2003-086699 (2003-03-01), None
patent: 2003-114253 (2003-04-01), None
patent: 2003-243521 (2003-08-01), None
patent: 2003-396214 (2003-11-01), None
Japanese Office Action issued in corresponding Japanese Patent Application No. JP 2004-001347, dated Apr. 18, 2007.
Ogawa et al., “A New Model of LSI at Power Supply Terminal for EMI Simulation,” EMC Engineering Center, Device Analysis Technology Labs, NEC Corporation, Japan.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Design method for semiconductor integrated circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Design method for semiconductor integrated circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Design method for semiconductor integrated circuit... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3891914

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.