Depletion free polysilicon gate electrodes

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438188, 438195, 438929, 257369, 257204, H01L 218238

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active

060906510

ABSTRACT:
A method of forming a supersaturated layer on a semiconductor device, where an initial phase layer is deposited on the semiconductor device. The initial phase layer has a solid phase dopant saturation level and a liquid phase dopant saturation level, where the liquid phase dopant saturation level is greater than the solid phase dopant saturation level. A concentration of a dopant is impregnated within the initial phase layers, where the concentration of the dopant is greater than the solid phase dopant saturation level and no more than about the liquid phase dopant saturation level. The initial phase layer is annealed, without appreciably heating the semiconductor device, using an amount of energy that is high enough to liquefy the initial phase layer over a melt duration. This dissolves the dopant in the liquefied initial phase layer. The amount of energy is low enough to not appreciably gasify or ablate the initial phase layer. The liquefied initial phase layer is cooled to freeze the dissolved dopant in a supersaturated, electrically activated concentration, thereby forming the supersaturated layer. An initial phase layer of either polysilicon or amorphous silicon may be deposited over a CMOS device. After laser annealing the initial phase layer with a melt duration of no more than about 100 nanoseconds, it is transformed into a doped polysilicon gate electrode that can be patterned and further processed.

REFERENCES:
patent: 4133705 (1979-01-01), Andre
patent: 4717688 (1988-01-01), Jaentsch
patent: 5770512 (1998-06-01), Murakoshi et al.
patent: 5908307 (1999-06-01), Talwar et al.
S.M. Sze, Semiconductor Devices 1985, John Wiley & Sons pp. 329-332.

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