Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2000-03-10
2002-02-05
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S004000, C438S759000, C438S911000
Reexamination Certificate
active
06344416
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to the field of semiconductor manufacturing and, more specifically, to deliberate semiconductor film variation during semiconductor manufacturing to compensate for radial processing differences, determine optimal device characteristics, or produce small production runs.
2. Background Art
Some semiconductor processing steps create radial differences across the wafer. For example, when performing Chemical-Mechanical Polishing (CMP) of the surface of a semiconductor wafer, the portion of the semiconductor wafer towards the outer circumference of wafer will be ground more than the inner portion of the semiconductor wafer. Similarly, during a Reactive Ion Etch (RIE) of the gate stack, the gates formed at the outer periphery of the semiconductor wafer will be etched more then the gates formed near the center of the semiconductor wafer. Consequently, the gates at the outer periphery of the semiconductor wafer will have a smaller width than the gates at the center of the semiconductor wafer. Both of these radial processing effects will cause radial differences in device characteristics between devices formed at the center of the wafer and devices formed near the outer periphery of the wafer.
Additionally, as the semiconductor industry progresses towards very large wafer sizes, there will be more waste during the small batches that are used to determine optimal device characteristics. For example, with large wafer sizes, a small company may only need to order enough chips to fill 20 to 50 wafers. To determine optimal device characteristics, several runs through the process will usually be performed with a few wafers. Each of these wafers will have something modified—such as gate width or composition of the gate dielectric—that is expected to change one or more device characteristics. Each of devices on the wafers are compared to determine which of the devices have the optimal device characteristics for the current application. However, these few wafers and the processing time and steps performed to complete them can be relatively expensive.
Moreover, as the semiconductor industry converts to large wafer sizes, small batches of specialty chips, especially those made for a small chip designer, can become relatively expensive. During production runs for a small chip designer, it is usually unclear what device characteristics are appropriate for the designer's chips. Consequently, several wafers will be run through the production line, with each wafer producing devices having different characteristics. The small chip designer can then choose the best chips to be packaged. Unfortunately, this process generates excessive waste, is therefore costly, and takes quite a bit of time.
Therefore, without a way to reduce or eliminate radial processing effects, to determine optimal device characteristics, or to produce small batches of varied semiconductor devices, semiconductor devices built near the center of the semiconductor wafer will have different characteristics than devices built near the periphery of the wafer, and there will be higher cost and more waste when performing prototyping to determine optimal device characteristics and to produce small batches of chips.
DISCLOSURE OF INVENTION
Accordingly, the present invention provides methods and apparatuses that can introduce deliberate semiconductor film variation during semiconductor manufacturing to compensate for radial processing differences, to determine optimal device characteristics, or produce small production runs. One of the embodiments of the present invention radially varies the thickness and/or composition of a semiconductor film to compensate for a known radial variation in the semiconductor film that is caused by performing a subsequent semiconductor processing step on the semiconductor film.
The advantage of this embodiment of the current invention is that the effects of the subsequent semiconductor processing step on the semiconductor film will be reduced. This creates more consistent devices over the entire surface of wafer. Moreover, because of the consistency of the devices, the devices towards the inner portion of the wafer will have the same electrical characteristics as the devices towards the outer portion of the wafer. This allows designers the freedom to design tighter electrical tolerances of the devices.
Additionally, the present invention provides methods and apparatuses that can introduce deliberate semiconductor film variations to determine optimal device characteristics or to produce small production runs of devices. Introducing semiconductor film variations, such as thickness variations and/or composition variations, allow different devices to be made on the same wafer. Variations in the semiconductor film cause variations between the devices. By measuring the device characteristics of devices having the variations, the device with the optimum device characteristic may be chosen.
This embodiment of the present invention has the advantage that one or a few semiconductor wafers may be used to produce many devices having different device characteristics. Many different device characteristics may be introduced. This allows the optimal device to be selected among these different devices. Because so few semiconductor wafers may be used to determine the optimal device, fewer semiconductor wafers and passes through processing systems will be used.
Moreover, when producing batches of chips for a small chip designer, low volume Application Specific Integrated Circuit (ASIC) chips may be produced more cost-effectively by reducing the number of wafers required to yield the desired amount of product. Each wafer can have multiple chips, with each row of chips having devices with different characteristics. This limits the amount of extraneous production runs to produce the appropriate chip having the required characteristics.
The foregoing and other advantages and features of the invention will be apparent from the following more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings.
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Furukawa Toshiharu
Hakey Mark C.
Holmes Steven J.
Horak David V.
International Business Machines - Corporation
Rocchegiani Renzo N.
Schmeiser, Olsen and Watts
Smith Matthew
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