Delay measuring device and semiconductor device

Details Delay measuring device and semiconductor device Delay measuring device and semiconductor device

2008-05-27

2011-12-13

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

C714S814000

Reexamination Certificate

active

08078950

ABSTRACT:
A delay measuring device according to the present invention comprises a memory cell, a delay element and a selector. The memory cell is provided with a non-inversion output terminal and an inversion output terminal, and the memory cell fetches a data value inputted from outside in synchronization with a clock, retains the fetched data value and outputs the retained data value from the non-inversion output terminal and the inversion output terminal. The delay element is connected to the inversion output terminal. The selector selects one of the data value and a delayed data value outputted from the delay element and supplies the selected data value to the memory cell. In the present invention, a comparison result of making a comparison between a delay amount generated in the delayed data value and a time length defined based on the clock is outputted from the non-inversion output terminal.

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patent: 2005/0111537 (2005-05-01), Sunter et al.
patent: 2005-322860 (2005-11-01), None

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