Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2011-04-12
2011-04-12
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S108000, C716S113000, C716S134000
Reexamination Certificate
active
07925998
ABSTRACT:
An input pin capacitance of a cell is obtained in advance in a function expression, and a delay is calculated in such manner that the input pin capacitance is calculated in functions of an input slew and a drive load capacitance in each instance. In a cell characterizing process, a total volume of a current running into an input terminal before a voltage value of the input terminal reaches a reference voltage is obtained so that a value approximate to a real input pin capacitance can be obtained.
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Hirata Masaaki
Ishibashi Noriko
Iwanishi Nobufusa
Dinh Paul
McDermott Will & Emery LLP
Panasonic Corporation
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