Defective memory block remapping method and system, and...

Details Defective memory block remapping method and system, and... Defective memory block remapping method and system, and...

2007-01-22

2010-06-22

Chung, Phung M (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S718000, C714S006130

Reexamination Certificate

active

07743303

ABSTRACT:
A non-volatile memory device includes a block remapping system that offsets an input block address by the addresses of non-functional blocks to provide an output block address that is used to address the memory device. The system generates the output block addresses by, in effect, adding to the input block address the addresses of all non-functional blocks of memory that are between an initial address and the output block address. The system performs this function be comparing the input block address to the address of any defective block. If the address of the defective block is less than or equal to the input block address, the addresses of all defective blocks starting at the block address are added to the input block address. The system then iteratively performs this process using each output block address generated by the system in place of the input block address.

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patent: 2009/0204847 (2009-08-01), Lakhani et al.

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