Defective cell repairing circuit and method of semiconductor mem

Details Defective cell repairing circuit and method of semiconductor mem Defective cell repairing circuit and method of semiconductor mem

1995-12-29

1997-08-12

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Bad bit

36523006, 3652257, G11C 700

Patent

active

056572808

ABSTRACT:
A defective cell repairing circuit for repairing a defective cell in a packaged semiconductor memory device enables repair mode operations for mapping an address of a detected defective cell to a redundant cell. The address of the defective cell is programmed by selectively cutting fuses corresponding to each bit of the defective cell address. The defective cell address programming operation uses input terminals on the packaged semiconductor memory device which are used for address signals in a normal operation mode, so that no additional pins are required. Repair mode operations are prevented after the repair mode is completed. Thereafter, an external address supplied to the semiconductor memory device is compared with the programmed defective cell address determined by the state of the fuses, and a redundant cell is selected if the two addresses correspond.

REFERENCES:
patent: 5359561 (1994-10-01), Sakomura et al.

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