Deep trench isolation of embedded DRAM for improved latch-up...

Details Deep trench isolation of embedded DRAM for improved latch-up... Deep trench isolation of embedded DRAM for improved latch-up...

2006-11-21

2006-11-21

Deo, Duy-Vu N (Department: 1765)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S296000, C257S510000, C257S513000, C257S524000, C257S527000

Reexamination Certificate

active

07138319

ABSTRACT:
A protective structure for blocking the propagation of defects generated in a semiconductor device is disclosed. In an exemplary embodiment, the structure includes a deep trench isolation formed between a memory storage region of the semiconductor device and a logic circuit region of the semiconductor device, the deep trench isolation being filled with an insulative material. The deep trench isolation thereby prevents the propagation of crystal defects generated in the logic circuit region from propagating into the memory storage region.

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