Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-08-27
1998-12-01
Graybill, David
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, 438692, H01L 21334, H01L 21302, H01L 21461
Patent
active
058438262
ABSTRACT:
A FET is formed that occupies a reduced surface area on a substrate because it incorporates elevated source/drain contacts provided at least partially over the field oxide regions. A silicon nitride mask is formed over the substrate and the mask is used for defining field oxide regions. Trenches are etched on either side of the mask and then thermal oxidation grows field oxide regions in the trenches so that the surface of the field oxide regions are approximately even with the original surface of the substrate. With the silicon nitride mask still in place, polysilicon is deposited over the substrate. The device is then planarized to remove the polysilicon from surfaces of the substrate, exposing the surface of the mask and leaving polysilicon structures on the field oxide regions on either side of mask. The mask is stripped and a layer of silicon is deposited over the polysilicon structures and on the active device region of the substrate, where the deposited silicon is epitaxial. A gate oxide layer is formed by oxidation of the epitaxial silicon and then a gate electrode is formed. The gate electrode can be spaced closer to the field oxide regions than is typically possible because contacts to the source/drain regions of the FET are formed through the first and second conductive structures.
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Graybill David
Jones Josetta I.
United Microeletronics Corp.
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